Electrically conductive rugged silicon surfaces are useful in the manufacturing of dynamic semiconductor storage devices requiring storage node capacitor cell plates large enough to maintain adequate charge, i.e., capacitance, in the face of parasitic capacitances and noise that may be present during operation of a circuit including the storage devices. Maintaining storage node capacitance is especially important due to the continuing increases in Dynamic Random Access Memory (DRAM) array density.
Such DRAM devices, among others, rely on capacitance stored between two conductors separated by a layer of dielectric material. One method of increasing the capacitance of a capacitor formed using conductive polysilicon layers is to increase the surface area of the conductors. Using conductive rugged silicon for the first conductor is one method of increasing the surface area of the conductors because the later-deposited dielectric layer and second conductor will typically conform to the surface of the first deposited conductor.
Hemispherical grain silicon (commonly referred to as HSG silicon) is one example of a silicon layer with a rugged surface, i.e., a surface that is not smooth. Hemispherical grain silicon can be obtained by a number of methods including Low Pressure Chemical Vapor Deposition (LPCVD) at conditions resulting in a layer of roughened polysilicon. Another method includes depositing a layer of amorphous silicon, followed by high temperature seeding and annealing to cause the formation of HSG silicon.
The silicon layers to be converted into HSG silicon or deposited as HSG silicon are not, however, typically in situ doped during deposition because in situ doping of the amorphous silicon can result in crystallites within the amorphous silicon layer. As a result, additional steps, such as seeding and/or annealing are required to reliably transform the in situ doped, generally amorphous silicon into rugged hemispherical grain silicon. Those additional steps increase cost and decrease throughput.